Andika: Clock Generator, PLL: Yes with Bypass, Ingizo: CMOS, HSTL, SSTL, Clock, Crystal, Pato: CML, HCSL, HSTL, LVCMOS, LVDS, LVPECL, SSTL, Idadi ya Mizunguko: 1, Uwiano - Pembejeo: Pato: 1:4,
