| Andika | Maelezo. |
| Hali ya Sehemu | Active |
|---|---|
| Andika | Clock Generator, Fanout Distribution, Zero Delay Buffer |
| PLL | Yes with Bypass |
| Ingizo | HSTL, LVCMOS, LVDS, LVPECL, LVTTL, SSTL |
| Pato | eHSTL, HSTL, LVCMOS, LVTTL, SSTL |
| Idadi ya Mizunguko | 1 |
| Uwiano - Pembejeo: Pato | 2:4 |
| Tofauti - Pembejeo: Pato | Yes/No |
| Mzunguko - Max | 267MHz |
| Mgawanyiko / Kuzidisha | Yes/No |
| Voltage - Ugavi | 3V ~ 3.6V |
| Joto la Uendeshaji | -40°C ~ 85°C |
| Aina ya Kuweka | Surface Mount |
| Kifurushi / Kesi | 48-LQFP |
| Kifurushi cha Kifaa cha muuzaji | 48-TQFP (7x7) |
| Hali ya RoHS. | Rohs inakubaliana. |
|---|---|
| Ngazi ya unyeti wa unyevu (MSL) | Haitumiki |
| Hali ya LifeCycle. | Kizamani / mwisho wa maisha. |
| Stock Jamii. | Inapatikana hisa. |
