Andika: Phase Lock Loop (PLL), PLL: Yes, Ingizo: Clock, Pato: Clock, Idadi ya Mizunguko: 1, Uwiano - Pembejeo: Pato: 2:3,
Andika: Phase Lock Loop (PLL), PLL: Yes, Ingizo: Clock, Pato: Clock, Idadi ya Mizunguko: 1, Uwiano - Pembejeo: Pato: 2:2,
Andika: Clock Generator, PLL: Yes, Ingizo: Crystal, Pato: PECL, Idadi ya Mizunguko: 1, Uwiano - Pembejeo: Pato: 1:1,
Andika: Clock Generator, Fanout Distribution, Multiplexer, Zero Delay Buffer, PLL: Yes with Bypass, Ingizo: LVCMOS, Pato: LVCMOS, Idadi ya Mizunguko: 1, Uwiano - Pembejeo: Pato: 2:14,
Andika: Clock Driver, Fanout Distribution, PLL: Yes with Bypass, Ingizo: LVPECL, Pato: LVPECL, Idadi ya Mizunguko: 1, Uwiano - Pembejeo: Pato: 2:5,
Andika: Clock Generator, Fanout Distribution, Multiplexer, PLL: Yes with Bypass, Ingizo: LVCMOS, Crystal, Pato: LVCMOS, Idadi ya Mizunguko: 1, Uwiano - Pembejeo: Pato: 3:9,
Andika: Clock Generator, Fanout Distribution, Multiplexer, Zero Delay Buffer, PLL: Yes with Bypass, Ingizo: LVCMOS, LVPECL, Pato: LVCMOS, Idadi ya Mizunguko: 1, Uwiano - Pembejeo: Pato: 3:12,
Andika: Clock Generator, Fanout Distribution, Multiplexer, Zero Delay Buffer, PLL: Yes with Bypass, Ingizo: LVCMOS, Crystal, Pato: LVCMOS, Idadi ya Mizunguko: 1, Uwiano - Pembejeo: Pato: 2:6,
Andika: PLL Frequency Synthesizer, PLL: No, Ingizo: Clock, Crystal, Pato: Clock, Crystal, Idadi ya Mizunguko: 1, Uwiano - Pembejeo: Pato: 3:2,
Andika: Clock/Frequency Synthesizer, Clock Generator, Multiplexer, PLL: Yes with Bypass, Ingizo: LVCMOS, Pato: LVCMOS, LVPECL, Idadi ya Mizunguko: 1, Uwiano - Pembejeo: Pato: 1:1,
Andika: Clock Generator, Fanout Distribution, Multiplexer, Zero Delay Buffer, PLL: Yes with Bypass, Ingizo: LVCMOS, LVPECL, Pato: LVCMOS, Idadi ya Mizunguko: 1, Uwiano - Pembejeo: Pato: 1:8,
Andika: Clock Driver, Fanout Distribution, Multiplexer, PLL: Yes, Ingizo: TTL, Pato: CMOS, TTL, Idadi ya Mizunguko: 1, Uwiano - Pembejeo: Pato: 3:8,
Andika: Spread Spectrum Clock Generator, PLL: Yes, Ingizo: Crystal, Pato: Clock, Idadi ya Mizunguko: 1, Uwiano - Pembejeo: Pato: 1:22,
Andika: Fanout Distribution, Spread Spectrum Clock Generator, Zero Delay Buffer, PLL: Yes, Ingizo: LVCMOS, Pato: LVCMOS, Idadi ya Mizunguko: 1, Uwiano - Pembejeo: Pato: 1:9,
Andika: PLL Clock/Frequency Synthesizer, PLL: Yes, Ingizo: Clock, Pato: CMOS, Idadi ya Mizunguko: 1, Uwiano - Pembejeo: Pato: 1:1,
Andika: Clock Generator, Fanout Distribution, Zero Delay Buffer, PLL: Yes with Bypass, Ingizo: LVCMOS, Pato: LVCMOS, Idadi ya Mizunguko: 1, Uwiano - Pembejeo: Pato: 2:12,